ChipScope Integrated Bit Error Ratio Test (IBERT) for Virtex-6 GTH Data Sheet(DS775) - 4.0 English - The Xilinx ChipScope Pro IBERT core for Virtex-6 FPGA GTH transceivers is customizable and can be used to evaluate and monitor the GTH transceivers. The design includes pattern generators and checkers implemented in FPGA logic, and access to the ports and DRP attributes of the serial transceivers. - DS775

Document ID

DS775

Release Date

2011-10-19

Version

4.0 English