Designing with Versal AI Engine: Architecture and Design Flow - 1 (AIE-ARCH) - This course describes the AMD Versal™ AI Engine architecture, the data communications within an AI Engine array and between the PL and AI Engines, how to program the AI Engines (single kernel programming and multiple kernel programming using data flow graphs), and how to analyze a kernel program by using various debugger features. - AIE-ARCH

aie-arch.pdf

Document ID
AIE-ARCH
Release Date
2026-01-15
Revision
1.0 English