Virtex-7 FPGA VC7215 Characterization Kit IBERT Getting Started Guide (Vivado Design Suite 2014.4) - 7.0 English - This document provides a procedure for setting up the Virtex-7 FPGA VC7215 GTH Transceiver Characterization Board to run the Integrated Bit Error Ratio Test (IBERT) demonstration. The demonstration shows the capabilities of the Virtex-7 XC7VX690T FPGA GTH transceiver. - UG970
ug970-vc7215-ibert-gsg.pdf
- Document ID
- UG970
- Release Date
- 2014-11-24
- Version
- 7.0 English