JESD204 v7.0 Product Guide - 7.0 English - This core implements a JESD204B interface supporting a line rate of up to 12.5 Gb/s on 1- 12 lanes using GTX or GTH transceivers in Zynq-7000 AP SoC devices, Kintex-7, and Virtex-7 FPGAs. Can be configured as tx or rx. Supports sharing GTX/ GTH transceiver between a transmitter and receiver. - PG066

pg066-jesd204.pdf

Document ID
PG066
Release Date
2016-04-06
Version
7.0 English