JESD204 v6.0 Product Guide - 6.0 English - The JESD204 core implements a JESD204B interface supporting a line rate of up to 12.5 Gb/s on 1 to 12 lanes using GTX or GTH transceivers in Zynq-7000 AP SoC devices and Kintex-7 and Virtex-7 FPGAs. The JESD204 core can be configured as transmit or receive. The core supports sharing a GTX or GTH transceiver between a transmitter and receiver. - PG066

Document ID

PG066

Release Date

2014-10-01

Version

6.0 English