Vivado Design Suite User Guide: Using Constraints - 2020.1 English - Describes using Xilinx® Design Constraints (XDC) in Vivado® tools. XDC combines industry-standard Synopsys Design Constraints (SDC) and Xilinx proprietary constraints. Details creating XDC to define clocks, I/O delays, and timing exceptions like false and multicycle paths, and min/max delays.