Vivado Design Suite User Guide: Model-Based DSP Design using System Generator - 2018.3 English - Details the use of System Generator to design DSP FPGAs, and MicroBlaze™ embedded processor designs running C/C++ programs. Designs are captured in Simulink® software with a Xilinx® specific blockset. FPGA synthesis, and place, and route, are automatically run to create the FPGA programming file. - UG897

Document ID

UG897

Release Date

2018-12-04

Version

2018.3 English