Vivado Design Suite Reference Guide: Model-Based DSP Design Using System Generator - 2017.3 English - Describes design elements used in the Vivado® tools, associated with Xilinx® 7 series and Zynq® architectures. Details both UniMacro and Xilinx primitive components, including VHDL and Verilog instantiation code, schematic symbols, truth tables, and other information specific to the design element. - UG958

ug958-vivado-sysgen-ref.pdf

Document ID
UG958
Release Date
2017-10-03
Version
2017.3 English