Vivado Design Suite Properties Reference Guide - 2014.3 English - Documents the properties available for use in the Vivado® Design Suite. For each property this manual provides a description; supported Xilinx® FPGA devices; applicable logic elements or device resources; accepted values; Verilog, VHDL, and XDC syntax examples; and affected FPGA design flow steps. - UG912
ug912-vivado-properties.pdf
- Document ID
- UG912
- Release Date
- 2014-09-30
- Version
- 2014.3 English