Vivado Design Suite User Guide: Model-Based DSP Design using System Generator - 2014.1 English - Details the use of System Generator to design DSP FPGAs, and MicroBlaze™ embedded processor designs running C/C++ programs. Designs are captured in Simulink® software with a Xilinx® specific blockset. FPGA synthesis, and place, and route, are automatically run to create the FPGA programming file. - UG897
ug897-vivado-sysgen-user.pdf
- Document ID
- UG897
- Release Date
- 2014-04-01
- Version
- 2014.1 English