KC724 IBERT Getting Started Guide (Vivado Design Suite 2013.4) - 2013.4 English - This document provides a procedure for setting up the KC724 Kintex®-7 FPGA GTX Transceiver Characterization Board to run the Integrated Bit Error Ratio Test (IBERT) demonstration using the Vivado Design Suite. The demonstration shows the capabilities of the Kintex-7 XC7K325T FPGA GTX transceiver. - UG931

ug931-kc724-ibert-gsg-vivado-2013.4.pdf

Document ID
UG931
Release Date
2013-12-18
Version
2013.4 English