LogiCORE IP AXI HWICAP (v2.02a) Data Sheet (AXI) - 2.02a English - The Xilinx LogiCORE IP Advanced eXtensible Interface (AXI) HWICAP (Hardware Internal Configuration Access Port) core for the AXI Interface enables an embedded microprocessor, such as the MicroBlaze processor, to read and write the FPGA configuration memory through the Internal Configuration Access Port (ICAP/ICAPE2). This enables you to write software programs that modify the circuit structure and functionality during the operation of the circuit. This document contains information about the AXI4 version of the core. - DS817

ds817_axi_hwicap.pdf

Document ID
DS817
Release Date
2012-04-24
Version
2.02a English