LogiCORE IP AXI Ethernet (v2.01a) Data Sheet (AXI) - 2.01a English - This document provides the design specification for the AXI Ethernet core. This core can implement a tri-mode (10/100/1000 Mbps) Ethernet MAC or a 10/100 Mbps Ethernet MAC. It supports most popular PHY interfaces, including 1000BASE-X and SGMII. The core optionally supports Ethernet AVB (Audio Video Bridging) funct ions. This core provides a control interface to internal registers via a 32-bit AXI4-Lite Interface subset. This AXI4-Lite slave interface supports single beat read and write data transfers (no burst transfers).