XPS SYSMON ADC (v3.00a) Data Sheet - 2.0 English - The XPS SYSMON ADC IP core is a 32-bit slave peripheral that connects to the PLB (Processor Local Bus) and provides the controller interface for the System Monitor (SYSMON) hard macro on the Virtex-5 and Virtex-6 family of FPGAs. This document describes the specifications for the XPS SYSMON ADC IP core. - DS620
xps_sysmon_adc.pdf
- Document ID
- DS620
- Release Date
- 2011-02-28
- Version
- 2.0 English