XAUI v10.1 Data Sheet - 10.1 English - The LogiCORE IP XAUI core is a high-performance, low pin count 10-Gbps interface intended to allow physical separation between data-link layer and physical layer devices in a 10-Gigabit Ethernet system. The XAUI core implements a single-speed full-duplex 10-Gb/s Ethernet eXtended Attachment Unit Interface (XAUI) solution for the Xilinx Virtex-7, Kintex-7, Virtex-6, Virtex-5, Virtex-4, and Spartan-6 FPGA devices. - DS266
xaui_ds266.pdf
- Document ID
- DS266
- Release Date
- 2011-02-28
- Version
- 10.1 English