7 Series FPGAs Memory Interface Solutions v1.7 User Guide (AXI) - 1.7 English - This guide serves as a technical reference to using, customizing, and simulating LogiCORE IP DDR3 and DDR2 SDRAM, RLDRAM II, and QDRII+ memory interface cores for 7 series FPGAs - UG586
ug586_7Series_MIS.pdf
- Document ID
- UG586
- Release Date
- 2012-10-16
- Version
- 1.7 English