Virtex-6 FPGA Embedded Tri-Mode Ethernet MAC Wrapper v1.5 Data Sheet - 1.5 English - The LogiCORE IP Virtex-6 FPGA Embedded Tri-Mode Ethernet MAC Wrapper automates the generation of HDL wrapper files for the Embedded Tri-Mode Ethernet MAC (Ethernet MAC) in Virtex-6 LXT, SXT, HXT, and CXT FPGAs using the Xilinx CORE Generator software. - DS710

Document ID

DS710

Release Date

2011-02-28

Version

1.5 English