7 Series FPGAs Memory Interface Solutions User Guide (AXI) - 1.4 English - This guide serves as a technical reference to using, customizing, and simulating LogiCORE IP DDR3 SDRAM memory interface cores for 7 series FPGAs - UG586
ug586_7Series_MIS.pdf
- Document ID
- UG586
- Release Date
- 2012-01-17
- Version
- 1.4 English