VC7203 IBERT Getting Started Guide (Vivado™ Design Suite 2012.3) - 1.0 English - Getting started guide for setting up the VC7203 Virtex-7 FPGA GTX Transceiver Characterization Board to run the Integrated Bit Error Ratio Test (IBERT) demonstration. - UG847
ug847-vc7203-ibert-gsg-vivado.pdf
- Document ID
- UG847
- Release Date
- 2012-11-07
- Version
- 1.0 English