LogiCORE IP SPI-4.2 v11.1 Data Sheet (AXI) - 1.0 English - The Xilinx SPI-4.2 (PL4) core implements and is compliant with the OIF-SPI4-02.1 System Packet Interface Phase 2 standard. This fully verified solution interconnects physical-layer devices to link-layer devices in 10 Gbps POS, ATM and Ethernet applications. The core leverages SelectIO features to achieve both smaller and faster SPI-4.2 products, which enables higher-level functions such as switches, bridges, and NPU interfaces. This document contains information about the AXI4 version of the core.