Create Vitis Platform - Create Vitis Platform - 2026.1 日本語 - XD260

Vitis チュートリアル: エンベデッド ソフトウェア (XD260)

Document_ID
XD260
Release_Date
2026-07-20
Version
2026.1 日本語

Note: Users can use the HSI Python API to extract the available processors from the XSA. This is discussed later in this tutorial

The Boot Artifacts will be automatically generated. For Zynq Ultrascale this will be the FSBL. If users dont want this, then use the no_boot_bsp = True

platform = client.create_platform_component(name = "base_platform",hw_design = "../zcu102/design_1_wrapper.xsa",os = "standalone",cpu = "psu_cortexa53_0")