Step 2: Create an IP Integrator Design - 2024.2 English

Programming an Embedded MicroBlaze Processor (XD131)

Document ID
XD131
Release Date
2024-11-20
Version
2024.2 English
  1. From Flow Navigator, under IP integrator, select Create Block Design.

  2. Specify the IP subsystem design name. For this step, you can use mbv_subsystem as the Design name. Leave the Directory field set to its default value of <Local to Project>. Leave the Specify source set drop-down list set to its default value of Design Sources.

  3. Click OK in the Create Block Design dialog box, shown in the following figure.

    ../../_images/image1-1v.png

  4. In the IP integrator diagram area, right-click and select Add IP.

    The IP integrator Catalog opens. Alternatively, you can also select the Add IP icon in the middle of the canvas.

    ../../_images/image2-1.png

  5. Type mig in the Search field to find the MIG core, then select Memory Interface Generator (MIG 7 Series), and press Enter.

    ../../_images/image3-1.png

    The Designer Assistance link becomes active in the block design banner.

  6. Click Run Block Automation.

    ../../_images/image4-1.png

    The Run Block Automation dialog box opens.

    ../../_images/image5-1.png

  7. Click OK. This instantiates the MIG core and connects the I/O interfaces to the I/O interfaces for the DDR memory on the SP701 board.

    ../../_images/image6-1.png

  8. Right-click anywhere in the block design canvas, and select Add IP. The IP catalog opens.

  9. In the Search field, type micr to find the MicroBlaze V IP, then select MicroBlaze V, and press Enter.

Note: If not displayed by default, the IP Details window can be displayed by clicking CTRL+Q on the keyboard while searching for IP.

../../_images/image7-1.png ../../_images/image8-1v.png