Important
Released with AMD Vitis™ Unified Software Platform and AMD Vivado™ Design Suite 2025.2 without changes from 2024.1.
Create an AMD MicroBlaze™ system for a Spartan-7 FPGA using Vivado IP integrator.
- Programming an Embedded MicroBlaze Processor
- Introduction
- Step 1: Start the Vivado IDE and Create a Project
- Step 2: Create an IP Integrator Design
- Step 3: Memory-Mapping the Peripherals in IP Integrator
- Step 4: Validate Block Design
- Step 5: Generate Output Products
- Step 6: Create a Top-Level Wrapper
- Step 7: Take the Design through Implementation
- Step 8: Export the Design to the Vitis software platform
- Step 9: Create a “Platform Component”
- Step 10: Create a “Peripheral Test” Application
- Step 11: Execute the Software Application on a SP701 Board
- Step 12: Connect to Vivado Logic Analyzer
- Step 13: Set the MicroBlaze to Logic Cross Trigger
- Step 14: Set the Logic to Processor Cross- Trigger
- Conclusion
- Lab Files
- Programming an Embedded MicroBlaze V Processor
- Introduction
- Step 1: Start the Vivado IDE and Create a Project
- Step 2: Create an IP Integrator Design
- Step 3: Memory-Mapping the Peripherals in IP Integrator
- Step 4: Validate Block Design
- Step 5: Generate Output Products
- Step 6: Create a Top-Level Wrapper
- Step 7: Take the Design through Implementation
- Step 8: Export the Design to the Vitis software platform
- Step 9: Create a “Platform Component”
- Step 10: Create a “Peripheral Test” Application
- Step 11: Execute the Software Application on a SP701 Board
- Step 12: Connect to Vivado Logic Analyzer
- Step 13: Set the Logic to Processor Cross- Trigger
- Conclusion
- Lab Files