In order to enable JTAG-based debugging of the AXI BRAM Controller and the DDR3 RAM, a connection between the MicroBlaze Debug Module (MDM) and AXI SmartConnect must be made.
Click Run Connection Automation.
In the Run Connection Automation dialog box box set the Slave interface option to either /axi_bram_ctrl_0/S_AXI or /mig_7series_0/S_AXI.
Either option will connect to the same AXI SmartConnect instance allowing for JTAG memory access.
3. Click the Regenerate Layout button 
in the IP integrator toolbar to generate an optimum layout for the block design. The block diagram should look like the following figure.
Note: The relative placement of your IP might be slightly different.
This connection connects the AXI4 master port of the MicroBlaze Debug Module (MDM) to the AXI SmartConnect for direct access to memory from JTAG. This allows fast program download, as well as transparent memory access when the connected MicroBlaze processors are executing.