Revision History

05/30/12

1.0

Initial Xilinx release.

02/01/13

1.1

Updated pin functions in Table: SPI Flash Pin Names. Updated SPI flash and 7 series FPGAs blocks in This Figure. Updated GUI steps to generate flash file in Preparing the SPI Flash Programming File. Updated This Figure, This Figure, and This Figure. Updated Programming the SPI Flash In-System.

01/31/14

1.2

Added Vivado Design Suite support to second paragraph of Summary. Updated Kintex-7 FPGA bitstream number and calculations in Configuration Clock Calculation Example. Updated description of M[2:0] in Table: SPI Flash Configuration Pins. In iMPACT Indirect Flash Operation Time Estimates, updated iMPACT software version and operation times. Updated URLs for ISE Design Suite documentation and Command Line Tools User Guide in References.

10/28/16

1.3

Added paragraph about Artix-7 and Spartan-7 devices to Selecting an SPI Flash. Added trace propagation delay to This Equation. In Configuration Clock Calculation Example, updated SPI flash clock to out values, added paragraph about trace propagation delays, and updated clock frequency from 93.9 MHz to 83.3 MHz. In References, added UG908 and Micron Serial NOR Flash Memory N25Q128A13, and updated URLs to ISE Design Suite documentation and Cypress Semiconductor.

08/20/20

1.4

In This Figure, updated OPCODE to 0BH. Removed obsolete reference to Micron Serial NOR Flash Memory N25Q128A13 data sheet from References.

12/09/22

1.5

Updated Summary and This Figure to replace reference to ISE® Design Suite to XILINX tools. Updated Introduction to include a reference to the Vivado Design Suite and added additional section references. Updated SPI Flash Basics reference to Xilinx Design Suite tools from ISE Design Suite and added reference to XAPP1328. Added 7-Series to This Figure title and Table: SPI Flash Configuration Pins. Added voltage to SPI Flash Configuration Interface. Updated the configuration option name in Configuring the FPGA from SPI Flash. Updated configuration option title in SPI Flash Configuration Time. Added SPI Flash Using Xilinx Vivado Design Suite and Appendix.