Use the following IDE flow in your Vivado tools design based in Project Mode to generate a bitstream for master SPI x4 configuration:
1.Add the recommended constraints from the SPI Flash Configuration Options to the designs constraint file. This step should ideally be done before synthesis and implementation. Adding constraints after synthesis or implementation causes these runs to be marked as out-of-date upon saving the constraints file. If no other constraints (or design files) are otherwise changed, the runs can safely be forced up-to-date using the Force-Up-to-Date option as described in Generating SPI Configuration Constraints: IDE Flow.
2.In the Flow Navigator, locate the Program and Debug tab and left click the Bitstream Settings button as shown in This Figure.
3.In the Project Settings dialog, select -bin_file which instructs the write_bitstream command to generate a headerless bitstream for programming the SPI flash. Click OK to accept this change.
Note: See UG908, Vivado Design Suite User Guide: Programming and Debugging for details on creating an alternative .mcs programming file using write_cfgmem.
4.In the Flow Navigator, click Generate Bitstream under the Program and Debug flow or select Generate Bitstream from the Flow menu.
X-Ref Target - Figure 9 |
This starts the Generate Bitstream flow. Upon completion, if no errors are encountered, a bitstream that can be used for SPI programming is found at:
<Project_Dir>\<Project_Name>.runs\impl_1\
Because the -bin_file option was selected earlier, the bitstream was generated as a BIN file with a .bin extension in addition to the standard .bit file. The .bin file is used for programming the SPI flash in SPI Programming File Generation.