Download the reference design files for this application note from the Adaptive SoC Transceiver IBIS-AMI Model Secure website.
Reference Design Matrix
The following checklist indicates the procedures used for the provided reference design.
| Parameter | Description |
|---|---|
| General | |
| Developer name | AMD |
| Target devices | Versal Premium, Prime, and HBM series |
| Source code provided? | Y |
| Source code format (if provided) | IBIS-AMI model |
| Design uses code or IP from existing reference design, application note, third party or AMD Vivado™ software? If yes, list. | N |
| Simulation | |
| Functional simulation performed | N |
| Timing simulation performed? | N |
| Test bench provided for functional and timing simulation? | N |
| Test bench format | N/A |
| Simulator software and version | Ansys Electronics Desktop, Keysight ADS |
| SPICE/IBIS simulations | Y |
| Implementation | |
| Implementation software tool(s) and version | N/A |
| Static timing analysis performed? | N |
| Hardware Verification | |
| Hardware verified? | Y |
| Platform used for verification | VPK180 |