Reference Design

Automatic Digital Pre-distortion Design Generation for AI Engine (XAPP1391)

Document ID
Release Date
1.0 English

Download the reference design files for this application note from the AMD website.

Reference Design Matrix

The following checklist indicates the procedures used for the provided reference design.

Table 1. Reference Design Matrix
Parameter Description
Developer name AMD
Target devices Versal AI Core devices
Source code provided? Y
Source code format (if provided) MATLAB script, AI Engine C code, Verilog, and Makefile
Design uses code or IP from existing reference design, application note, 3rd party or Vivado software? If yes, list. N
Functional simulation performed Y
Timing simulation performed? N
Test bench provided for functional and timing simulation? N
Test bench format Verilog and C
Simulator software and version AI Engine Simulator and XSIM in Vitis 2022.1
SPICE/IBIS simulations N
Synthesis software tools/versions used Vivado synthesis
Implementation software tool(s) and version Vitis 2022.1
Static timing analysis performed? Y
Hardware Verification
Hardware verified? Y
Platform used for verification VCK190