Host Programming of QSPI Flash Host Programming of QSPI Flash (XAPP1372)

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1.1 English

The reference design has the following features:

  • Read QSPI flash ID
  • Erase/write QSPI flash
  • Verify QSPI flash
  • All the host operations to QSPI are via PCIe. The hardware PCIe bus is configured as Gen2 x1 using the Integrated Block for PCI Express.
  • No involvement of the Versal device PS
  • QSPI flash DMA read support
  • PL block RAMs replace DDR memory to store the verified data, thereby saving DDR space