In the case of SSI technology devices, the SLR boundaries serve as natural isolation boundary/fence. No additional fence is required between SLRs if an SLR region contains only one isolated Pblock. If every SLR region consists of a single isolated Pblock, no additional fence is needed. However, if an SLR region contains multiple isolated Pblocks, the appropriate fence is needed between them
The following figure shows four isolated Pblocks, highlighted in four different colors, drawn in each SLR regions of an self-sovereign identities technology (SSI technology) device. No explicit fence is needed between the Pblocks as the SLR boundaries serve as isolation fence.
In the following figure, no fence is needed between Isolated Pblock 1 and Isolated Pblock 2 because they have the SLR boundary of region 2 and 1 as a natural isolation fence. But a fence is still required between Isolated Pblock 3 and Isolated Pblock 1, and between Isolated Pblock 3 and Isolated Pblock 2. Be aware that the light-grey color in the diagram is the FPGA logic. A fence is required between the bottom right corner of Isolated Pblock 1, and the top left corner of the second half of Isolated Pblock 3, to account for diagonal adjacency violation.