Software running on the MicroBlaze™ processor drives the AXI Quad SPI core to read and write to the SPI flash memory using the hardware connections to the STARTUPE3 primitive. The flash_qspi_rw.c file included with this reference design provides example low-level software read and write operations. These read and write functions are used to implement the Micron flash memory operations described by the command descriptions in the Micron Serial NOR Flash Memory N25Q256A11E and MT25Q256U Data Sheets (www.micron.com). This memory is located on the KCU105 evaluation board at location U35 (see Figure 1).
The functions in flash_qspi_rw.care provided as a starting point for creating memory operations that might be necessary with flash memories from other vendors. Most SPI flash memories share a similar set of commands that allow control logic to read, write, or erase the flash array and access registers that control the flash memory behavior. This reference design uses the command set for the Micron MT25QU256ABA SPI flash memory used on the KCU105 evaluation board and supports the set of instructions listed in Micron Serial NOR Flash Memory N25Q256A11E and MT25Q256U Data Sheets (www.micron.com).