Implementing the Design

Zynq 7000 SoCs or 7 Series FPGAs Isolation Design Flow Lab (Vivado Design Suite) (XAPP1256)

Document ID
XAPP1256
Release Date
2023-12-21
Revision
1.3 English
These steps describe how to generate and run a design implementation.
  1. Under the Design Runs tab, at the bottom of the Vivado GUI, right-click impl_1 and select Change Run Settings.
  2. The lab design is densely populated for the K0 and K1 modules and the Area Explore run Strategy produces the best results.
    1. From the Stratagy pull-down menu, select Area_Explore (Vivado Implementation 2023).
      Note: For other Vivado versions, select corresponding Vivado Implementation option.
    2. Click OK (as shown in the following figure).
      Figure 1. Device View - Implemented Design
  3. Click Run Implementation under the Implementation menu on the left of the Vivado GUI.
  4. Save the project or constraints if asked. If any constraints were modified, the Vivado tool requests starting from Synthesis. This is okay.
  5. When implementation is complete, select the Open Implemented Design option and click OK. The device view appears and looks like the following figure (the pblocks are also highlighted to clearly identify the isolated regions).
  6. If asked to close the Synthesized Design before opening the Implemented Design, click Yes. This is good practice because memory might be limited.
    Figure 2. Implemented Design - Device View