SD-SDI EDH Error Detection - SD-SDI EDH Error Detection - XAPP1249

The UHD-SDI receiver optionally contains an EDH processor that checks the SD-SDI signal for errors. This EDH processor does not update EDH packets in the SD-SDI stream. It simply reports any errors found and also captures the error flags from each EDH packet. The receiver EDH processor can be set to either include in the core or not or by using the INCLUDE_RX_EDH_PROCESSOR parameter to the UHD-SDI wrapper. The EDH processor has a 16-bit counter which counts the number of fields that have errors. The current error count is output on the rx_edh_errcnt_in port. The counter can be cleared by asserting rx_edh_clr_errcnt_in High. You can specify which types of errors are counted using the rx_edh_errcnt_en_in port. This port has 16 unary bits which enable and disable 16 different error types. Any bit that is High enables the corresponding error. When this type of error is detected, the error counter increments. Any bit that is Low disables the corresponding error. The following table shows the encoding of the bits on the rx_edh_errcnt_en_in port.

The ANC error conditions occur when there are errors in the ancillary data packets. The FF error conditions occur when there are errors in the full field. The AP error conditions occur when there are errors in the active portion of the picture. The EDH packet checksum error indicates a checksum error found within the EDH packet itself.

The ANC, FF, and AP error condition sets each have five individual error flags, described below. All flags are asserted High to indicate an error condition. For a complete description of the EDH, EDA, IDH, IDA, and UES error flags in the EDH packet, refer to the SMPTE RP 165 document available from SMPTE.

• EDH error: This error condition occurs when the EDH processor detects a CRC error (checksum error for ANC packets) in a field.
• EDA error: This error condition occurs when the EDA or EDH flags of the received EDH packet are asserted.
• IDH error: This error condition is not supported by the EDH processor.
• IDA error: This error condition occurs when the IDA or IDH flags of the received EDH packet are asserted.
• UES error: This error condition occurs when the UES flag in the received EDH packet is asserted.

The actively computed EDH errors for the ANC, AP, and FF are also output on the rx_edh_anc_out, rx_edh_ap_out, and rx_edh_ff_out ports, respectively. Thus, the rx_edh_anc_out port is asserted whenever a checksum error is detected in an ancillary data packet. The rx_edh_ap_out port is asserted when the calculated active picture CRC does not match the AP CRC in the EDH packet. The rx_edh_ff_out port is asserted when the calculated full field CRC does not match the FF CRC in the EDH packet.

The EDH processor also outputs the ANC, AP, and FF flags from the EDH packet on the rx_edh_anc_flags_out, rx_edh_ap_flags_out, and rx_edh_ff_flags_out ports, respectively. These output ports are exact copies of the flags found in the last received EDH packet. This means they differ from the actively computed error conditions shown previously. For example, the EDH flag (bit 0) of the rx_edh_ap_flags_out port indicates that the AP EDH flag is set in the last received EDH packet. But, the rx_edh_ap_out port indicates that the active picture CRC calculated locally by the EDH processor does not match the AP CRC value in the EDH packet. The rx_edh_anc_flags_out, rx_edh_ap_flags_out, and rx_edh_ff_flags_out ports are each 5 bits wide and are encoded as shown in the following table.

The EDH processor also produces four error flags related to the format and contents of the EDH packet. These error flags are output on the rx_edh_packet_flags_out port. The encoding of this port is shown in the following table.