Use the 7 Series FPGAs Transceivers Wizard to generate a GTX wrappers that contains the GTXE2_COMMON and GTXE2_CHANNNEL blocks.
The GTX wrapper generated by the Wizard is actually a hierarchy of wrapper levels. The upper level wrappers contain additional reset logic that is not compatible with SDI operation. So, only the lowest level GTX wrapper file is actually useful for SDI applications. The lowest level GTX wrapper always contains a single GTXE2_CHANNNEL instance. The easiest way to generate and use the GTX wrapper is to use the Wizard to generate just a single transceiver and then instantiate the lowest level GTX wrapper multiple times in the application, once for each GTX transceiver that is used for SDI. Also, the GTX common wrapper must be instantiated as many times as necessary, once for each GTX Quad containing transceivers implementing SDI interfaces. If only the CPLL is being used for serial clocks to the GTX transceivers, then the GTX common wrapper doesn't need to be instantiated at all because it only contains the QPLL. The SDI demonstration applications supplied with this application note provide examples of how to instantiate the GTX wrapper and the GTX common wrapper.
In CPLL-based 7 series GTX designs there can be a current spike on MGTAVTT immediately after configuration. AMD released Answer Record 59294 to address this issue which instructs GTX users to hold the CPLLPD High for several reference clock pulses after configuration, only then CPLLPD can be released to proceed to normal GTX initialization. A 7 Series FPGAs Transceivers Wizard module called CPLL Railing that specifically handles the CPLLPD sequencing must be used with each active CPLL in the design.
The following information details exactly the steps required to generate the GTX wrapper using the Wizard version 3.6 from the Vivado IP catalog.
Because the top-level GTX wrapper is not used in the SDI application, it is best not to generate the GTX wrapper in the same Vivado project as the SDI application. Run the Vivado tools and create a new project just for the purpose of generating the GTX wrapper for SDI. After the GTX wrapper is generated, only those GTX wrapper files that are needed for SDI can be added to the actual SDI Vivado project. Always specify the same 7 series FPGA in the GTX wrapper Vivado project and in the SDI Vivado project.
After creating the GTX wrapper Vivado project, open the IP catalog. The 7 Series FPGAs Transceivers Wizard is found in the IO Interfaces folder in the top-level FPGA Features and Design folder of the Vivado IP catalog. Locate the Wizard in the IP catalog and double-click on it to launch the Wizard.
Version 3.6 of the Wizard does not contain a protocol template for 6G-SDI or 12G-SDI. However, it comes with HD-SDI and 3G-SDI presets; the 3G-SDI presets are to be used as the baseline moving forward. The instructions given in this section describe how to create a GTX wrapper with all the proper settings and ports necessary for implementing an SDI interface.
The Wizard launches with the GT Selection tab open as shown in the following figure. Above the tabs is a text field called Component Name. The name entered here is used as the name for the GTX wrapper file and the name of the GTX component. In this example, the component name is GTXE2_CHANNNEL.
Near the top of the GT selection tab type of transceiver used must be specified. Depending on the 7 series device selected for the project, GTX and/or GTH transceivers can be selected. The device selected for the Vivado project in this example only has GTX transceivers, so only GTX transceivers can be selected and the GT Type selection menu is grayed out in the previous figure.
In the Shared Logic section, select Include Shared Logic in example directory.
When moving from tab to tab, click on the tabs located under the Component Name field. Do not click the OK button until all tabs have been correctly set up. The OK button closes the Wizard.
Go to the Line Rate, RefClk Selection tab, shown in the following figure. Select 3g sdi from the Protocol drop down list. This sets all basic settings in the Wizard for 3G-SDI operation. This preset is to be used as baseline to change the Wizard settings for 6G-SDI and 12G-SDI applications.
The Line Rate (Gbps) must be set depending on the PLL used and maximum line rate to be supported. If the maximum line is 12G-SDI, set the line rate of the RX or TX, whichever is selected to use the QPLL to 11.88 Gbps. If the maximum line rate is 6G-SDI or lower, set the line rate to 5.94 Gbps. The line rate of the other side associated to CPLL to must always be set to 5.94 Gbps. Setting the QPLL to 11.88 Gbps ensures that the Wizard sets the QPLL VCO to Upper Band which is essential for 12G-SDI operation. Set the Reference Clock frequency for both the TX and RX to the desired value, typically 148.5 MHz.
Do not change the line rate to 11.88/1.001 Gbps or 5.94/1.001 Gbps and the reference clock frequency to 148.5/1.001 MHz. The SDI control module takes care of switching to the 1/1.001 rates from the 1/1 rates. The control module also takes care of dynamically switching to the other line rates of 11.88 Gbps for 12G-SDI, 2.97 Gbps for 3G-SDI, 1.485 Gbps for HD-SDI and 270 Mbps for SD-SDI. The line rate specified on this tab should always be 11.88 Gbps and 5.94 Gbps. Alternative reference clock frequencies can be chosen on this tab, but only choose from those that are available in the Reference Clock pull down lists.
The TX off and RX off checkboxes allow the creation of GTX wrappers with only transmitters (by selecting RX off) or only receivers (by selecting TX off). In this example, neither of these options is selected.
The Quad Column does not matter in this case, so just leave it to its default value.
Use Common DRP is usually not selected for SDI applications.
The bottom section of the Line Rate, RefClk Selection tab allows the user to choose which GTX transceivers and Quads are included in the top level GTX wrapper. It also allows the user to choose the reference clocks used by the PLLs and which PLL supplies the serial clock to each transceiver. For SDI applications always generate a GTX wrapper with a single GTX transceiver. It doesn't matter which transceiver is selected and using the single transceiver that is selected by default is the easiest.
In this example, the RX unit uses the QPLL which uses REFCLK1 Q1 as its reference clock. The TX unit uses the CPLL referenced to REFCLK0 Q1. The Wizard doesn't explicitly handle the case where TX units are dynamically switched between the QPLL and the CPLL. The SDI control module takes care of the control for this dynamic switching. But, to build a GTX wrapper with all the PLLs active and connected properly for dynamic switching of the TX between the QPLL and the CPLL, assign the QPLL as the RX clock source and the CPLL as the TX clock source and assign different reference clocks to the QPLL and the CPLL as shown in the previous figure. In cases where the QPLL is not being used and only the CPLL is used, use the CPLL as the reference clock source to both the RX and the TX units.
Enable Advanced Clocking Option.
Go to the Encoding and Clocking tab, shown in the following figure.
For both the TX and the RX section, the External Data Width must be set to 40 and the Internal Data Width must also be set to 40. The TX Encoding and the RX Decoding must be set to None.
Use DRP is always selected and cannot be deselected. Set the DRP frequency to the nominal frequency of the clock connected to the GTX drpclk port. None of the optional ports in the top section, under the DRP frequency selection, are required for SDI.
It is highly recommended that the RX and TX buffers be used for SDI applications. Thus, the Enable TX Buffer and Enable RX Buffer should be selected. The TXUSRCLK Source is set to TXOUTCLK and cannot be changed. However, the RXUSRCLK Source must be made sure to be of value RXOUTCLK, as shown in the previous figure.
In the bottom Optional Ports section, the following ports are required for SDI applications: RXSYSCLKSEL, RXCDRHOLD. If the application requires that the TX units dynamically switch between the QPLL and the CPLL, then the TXSYSCLKSEL port is also required. It is recommended that the TXSYSCLKSEL port always be selected and, if dynamic switching of the TX is not required, the TXSYSCLKSEL port can be hard wired to select either the QPLL or the CPLL as the serial clock source.
Go to the Comma Alignment and Equalization tab, shown in the following figure.
The settings in the Termination and Equalization section must be changed to the values shown in the previous figure. The Differential Swing and Emphasis Mode must be set to Custom, RX Equalization Mode must be set to LPM-Auto, the RX Termination Voltage must be set to Programmable, and the Trim Value must be set to 800 mV.
In the Optional Ports section, any of these ports can be enabled or disabled depending on the application requirements. The TXPOSTCURSOR and TXPRECURSOR ports can be selected if these ports are needed to improve the integrity of the signal from the TX to the external SDI cable driver.
Move to the PCIE, SATA, PRBS tab, shown in the following figure. Most of the options on this page are not relevant to SDI and should be left at their default values. There are a few ports in the Optional Ports section that can be useful for SDI applications.
The LOOPBACK port is selected by default. This port allows for dynamic selection of various loopback modes where the data being transmitted by the GTX TX is looped back to the GTX RX in the same transceiver. The loopback modes can be useful for debugging purposes, but generally are not used in production applications.
At this point, all selections necessary for creating a GTX wrapper for SDI applications have been made. The CB and CC Sequence tab is for protocols that use channel bonding and clock correction. SDI uses neither of these. The Summary tab provides a summary of the selections made on the other tabs. The GTX wrapper is generated by clicking the OK button and then the Generate button when the next menu opens.
The Wizard generates various files, some that are required for an SDI application plus a lot of other example files that should not be used for SDI. The files that are used all start with the component name assigned to the GTX wrapper by the user in the Wizard. The required files are:
- <component_name>_gt.v: lowest level GTX wrapper
- <component_name>_cpll_railing: cpll railing logic
- <component_name>_common.v: common wrapper
If the Vivado project name is sdi_wrapper, Verilog is selected as the default language, and the component name given to the GTX wrapper is k7gtx_uhdsdi_wrapper, the paths to the necessary files would be:
sdi_wrapper/sdi_wrapper.srcs/sources_1/ip/k7gtx_uhdsdi_wrapper/k7gtx_uhdsdi_wrapper_gt.v
sdi_wrapper/sdi_wrapper.srcs/sources_1/ip/k7gtx_uhdsdi_wrapper/k7gtx_uhdsdi_wrapper_cpll_railing.v
sdi_wrapper/sdi_wrapper.srcs/sources_1/ip/k7gtx_uhdsdi_wrapper/k7gtx_uhdsdi_wrapper_common.vThe support directory and the GTX common wrapper located in the support directory aren't automatically created when you generate the GTX wrapper using the Wizard. You must right click on the SDI wrapper item in the pop-out menu and choose the Generate Output Products… action as shown in the following figure.
Editing the GTX Wrapper
Version 3.6 of the Wizard generates GTX wrapper and GTX common wrappers that require some hand editing to be compatible with SDI. This section describes the required changes to these wrapper files.
The GTX common wrapper file named <component_name>_common.v generated by version 3.6 of the wizard has an incorrect parameter that causes the QPLL to run at the wrong frequency. The parameter is QPLL_FBDIV_TOP. The correct value of this parameter for SDI is 80 when using a reference clock of 148.5 MHz or 148.5/1.001 MHz.
The QPLL_FBDIV_TOP parameter is used to calculate the correct values of the GTXE2_COMMON primitive's QPLL_FBDIV and QPLL_FBDIV_RATIO parameters. If a reference clock frequency other than 148.5 MHz or 148.5/1.001 MHz is used, refer to 7 Series FPGAs GTX/GTH Transceivers User Guide (UG476) for details of how to determine the correct values for the QPLL_FBDIV and QPLL_FBDIV_RATIO parameters.
In the lowest level GTX wrapper named <component_name>_gt.v, several changes must be made to turn off auto adaptation of the LPM equalizer in SD-SDI mode. The rxosovrden input port must be added in the wrapper top-level ports and be connected to the RXOSOVRDEN port of the GTXE2_CHANNEL instance.
Assign the following equalizer attributes as follows:
- RX_DFE_GAIN_CFG: 23'h0200EA
- RX_DFE_H3_CFG: 12'b000000111110
- RX_DFE_H4_CFG: 11'b00011011110
- RX_DFE_H5_CFG: 11'b00011011110
- RX_DFE_KL_CFG: 13'h00FE
- RX_DFE_LPM_CFG: 16'h0954
- RX_DFE_VP_CFG: 17'h03F03
By default, RXDFEAGCOVRDEN, RXDFELFOVRDEN, RXDFETAP2OVRDEN, RXDFETAP3OVRDEN, RXDFETAP4OVRDEN, RXDFETAP5OVRDEN, and RXDFEUTOVRDEN ports are wired to the net named tied_to_ground_i. Change the signal wired to these ports to tied_to_vcc_i. The GTX wrapper provided with the demonstration applications supplied with this application note has these changes made so it can be used as an example.