As with the TX section, the user application should rely on the SDI control module to carefully coordinate all of the RX reset and dynamic change activities described here to prevent them from interfering with each other.
These conditions require rests of the GTX RX section:
- Whenever the PLL that supplies the serial clock to the GTX RX is reset, the gtrxreset port must be used to reset the RX section. This is done automatically after FPGA configuration by the SDI control module and whenever the user application asserts the rx_gtx_full_reset_in to the SDI wrapper, causing both the PLL and the GTX RX to be reset.
- Changes in the SDI mode between SD, HD, 3G, 6G, and 12G-SDI require changes various input ports of the GTX and also to various attribute settings through the DRP. The SDI control logic makes these changes automatically whenever the RX SDI mode changes. After the SDI control logic has made all of the required modifications, it resets the GTX RX section using the gtrxrest port of the GTX.
The UHD-SDI wrapper has three reset inputs for the RX section:
- rx_rst_in
- When asserted High, this input resets the SDI RX datapath in the UHD-SDI core. It does not reset the GTX at all.
- rx_gtx_full_rest_in
- When asserted High, this input resets both the PLL associated with the RX and then the RX section of the GTX transceiver (gtrxreset). These two resets are sequenced so that the gtrxreset does not complete until after the PLL reset is complete and the PLL is locked to its reference clock.
- rx_gtx_reset_in
- When asserted High, this input resets only the RX section of the GTX transceiver (gtrxreset). If the PLL is not locked when the gtrxreset sequence begins, the gtrxreset sequence does not complete until after the PLL is locked.