Sending Tamper Status Outputs to System - Sending Tamper Status Outputs to System - XAPP1098

Developing Tamper-Resistant Designs with UltraScale and UltraScale+ FPGAs (XAPP1098)

Document ID
XAPP1098
Release Date
2025-05-22
Revision
1.5.1 English

Upon a tamper event (in addition to asserting a penalty) your design could send tamper status information back to the system (instead of or in addition to logging it locally in user eFUSE space). The system could then store this information away for future auditing purposes. It would have to be designed to transmit the data before an IPROG command (tamper penalty) is given.