Key Erase via External Shunt - Key Erase via External Shunt - XAPP1098

Another method to erase the BBRAM key is via an external shunt to ground on the V_BATT line. This method can be used to erase the key when main power (V_CCINT and V_CCAUX) to the FPGA is not applied because active features, such as KEYCLEARB, can be used only after the FPGA is powered up and configured. For instance, if a system-level tamper event is detected prior to the FPGA having its main power applied (perhaps a tamper switch becomes activated), the external battery power line to the FPGA’s V_BATT pin can be opened and the V_BATT pin driven to ground with some sort of transistor shunt. Care must be taken that the circuit is designed to open the battery connection before shunting the V_BATT pin to ground. Another option is to connect the battery to the V_BATT pin via a resistor. (The V_BATT pin maximum input current is 150 nA.) By choosing the appropriate resistance value, the V_BATT pin can be shunted to ground directly without causing excessive current flow out of the battery.

If an FPGA is not powered up (no V_CCINT, V_CCAUX, or other voltages except for V_BATT), it would take a worst-case maximum time of 50 ms for the AES key stored in BBRAM to become erased if a user was to properly shunt the V_BATT pin to ground at –55°C.