Whenever an encrypted or authenticated bitstream has been loaded into the FPGA, readback of the internal configuration memory cannot be performed by any of the external interfaces (including JTAG). All external readback is automatically blocked (disabled) by hardened triple-redundant logic. The only readback access to the configuration memory after an encrypted bitstream load is via the internal configuration access port (ICAPE3). Because the bitstream is authenticated during the loading process, the ICAPE3 is considered a trusted channel. The ICAPE3 is also considered a trusted channel because it can only be used via a direct connection to the design within the FPGA logic. If the design does not instantiate the ICAPE3, it cannot be used at all.
Note: A Vivado tools security option via a particular
control bit in the bitstream provides a soft means of enabling and disabling readback.
This bit can be changed during configuration. Therefore, readback disable is easy to
defeat for devices that are not using an encrypted or authenticated bitstream. Hardened
readback disabling has no such weakness and always overrides the security option when
using an encrypted or authenticated bitstream. AMD recommends using both
the hard and soft methods of disabling readback.