This application note summarizes the AT features currently available in UltraScale and UltraScale+ FPGAs and gives practical examples of how to use them effectively. By taking advantage of these features and following the AT guidance early on in the design cycle, a tamper-resistant FPGA-enabled system design can be realized.
No single AT feature or technique is 100% effective all of the time or can meet all the AT needs for the entire system. However, making the adversary’s job as difficult and expensive as possible and following a multi-layered approach almost always yields very good results.
The tools and technologies for the development and testing of new integrated circuits including FPGAs are always evolving and improving. In parallel, the tools used by the adversary also evolve and improve, so it is important to be aware of what AT features and techniques are available for use. Additionally, AMD is committed to staying abreast of these developments to enhance and develop new features to protect customer IP now and into the future.