VNP4 Example Designs

The following table provides a summary of the device resource utilization numbers for the example designs that are released with VNP4. These example designs are primarily to showcase the various features of the P4 language that are supported in VNP4, rather than complete applications, but the resource numbers still highlight the efficiency of implementing various features.

Note: Utilization numbers are based on 100 Gb/s setup, where T_{DATA_NUM_BYTES} = 64 and the PKT_RATE = 150.

Table 1. VNP4 Example Designs
P4 Program Name	LUTs (Total)	Flip-Flops	Block RAMs	UltraRAMs	Latency (Cycles)	Tables as % of LUTs
Echo	3106	6784	2	0	26	0%
FiveTuple	8807	15702	6	16	49	33%
FiveTuple_tinycam	8605	15215	6	4	30	38%
Forward	65251	85615	250	0	68	93%
Forward_tinycam	11923	18680	2	0	32	65%
Calculator	2542	5149	2	0	26	5%
Advanced Calculator	2969	5814	3	0	59	4%
Testing and analysis by AMD as of 11/24/23, using AMD Vivado™ Design Suite 2023.2 and an AMD Virtex™ UltraScale+™ device (xcvu37p-fsvh2892-2L-e), with out-of-context synthesis and implementation, and utilization numbers from a post-place utilization report. Actual results can vary. VIV-009.