S_G Block Architecture

Replacing FMEA with Datapath Analysis for IP Designs (WP545)

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1.0 English

If a block contains multiple functions (sub-blocks), this method is applied recursively as shown in the following figure. This figure shows the architecture of block 4. There are five external signals identified with two of these signals going external to the IP block 4 itself.

Figure 1. S_G Block Architecture

Like the process detailed previously in Step 3: Block-level Documentation, the viewpoint is only the architecture of block 4. The block 4 tab contains a complete breakdown of all of the sub-blocks. In this tab, the S_G block is systematically broken down using the same approach in which the external connections are listed under the external connections as signaling coming into the block and the internal signals between sub-block are listed under the internal signals for each sub-block. Consequently, the recurse process of Step 3 can be applied to a hierarchy with care using the repeat flags so communication buses and signaling are not double counted. See the Sub Block sections in the S_G Block table in S_G Block.

These sub-blocks can be documented using separate tabs.

Note: Because block 4 has a hierarchy, no diagnostics or other metrics are reported in this Block_4 Block Function Description entry. This is the reason for the See Breakout under fault modes (see following table).