The following table lists the external
connections and internal signaling for the S_G block.
| BLOCK 4 | Scatter-Gather | ID TAG | Fault Modes | Fault Initiators | Proposed Diagnostics | Repeat | Claimed DC Coverage |
|---|---|---|---|---|---|---|---|
| External Connections | Signal/Bus Name | ||||||
| 1 | m_axi_sg_ | TOP_axi_sg | Bus Write to incorrect address | Address Write register corruption | Parity | 99.50% | |
| Control plane state machine corruption | Redundancy | 99.80% | |||||
| Clocking corruption | |||||||
| Driver/receiver failure | |||||||
| Bus write with incorrect data | Write Data register corruption | Parity | 99.50% | ||||
| Control plane state machine corruption | Redundancy | 99.80% | |||||
| Clocking corruption | |||||||
| Driver/receiver failure | Loopback | 90.00% | |||||
| Bus Read from incorrect address | Read Address register corruption | Parity | 99.50% | ||||
| Control plane state machine corruption | Redundancy | 99.80% | |||||
| Clocking corruption | |||||||
| Receiver failure | |||||||
| Bus read incorrect data | Read Data register corruption | Parity | 99.50% | ||||
| Control plane state machine corruption | Redundancy | 99.80% | |||||
| Clocking corruption | |||||||
| Receiver failure | Parity | 99.50% | |||||
| 1 (cont'd) | Bus hang | Control plane state machine corruption | Redundancy | 99.80% | |||
| External watchdog | 90.00% | ||||||
| 3 | m_axi_sg_aclk | TOP_axi_sg_clk | No clock | Logic connection failure | External watchdog | 90.00% | |
| Incorrect clock frequency | Clock divider failure | External watchdog | 90.00% | ||||
| 4 | CLK | TOP_CLK | No clock | Logic connection failure | External watchdog | Y | |
| Incorrect clock frequency | Clock divider failure | External watchdog | |||||
| 5 | axi_resetn | TOP_axi_resetn | Unintended reset assertion | Logic connection failure | Supervision | Y | |
| Reset signal timing too short | Clock divider failure | Supervision | |||||
| Internal Signal Block Connections | Signal/Bus Name | ID TAG | Fault Modes | Diagnostics | Repeat | EST DC Coverage | |
| 1 | b2_b4_signaling | b1_b2_signal | Incorrect data | Data register corruption | Data parity | 99.50% | |
| Incorrect clocking | Clock divider failure | External watchdog | 90.00% | ||||
| 2 | b3_b4_signaling | b2_b3_signal | Incorrect data | Data register corruption | Data parity | Y | |
| Incorrect clocking | Clock divider failure | External watchdog | |||||
| 3 | b4_b5_signaling | b2_b4_signal | Incorrect data | Data register corruption | Data parity | 99.50% | |
| Incorrect clocking | Clock divider failure | External watchdog | 90.00% | ||||
| Block Function Description | ID TAG | Fault Modes | Diagnostics | Repeat | EST DC Coverage | ||
| Function block manages scatter-gather operation of the DMA by reading the descriptor from main memory, decoding the descriptor and updating the address and range of the DMA controller for each channel. | S_G_BLOCK | See breakout | |||||
| Sub Block | MM2S_Controller | Block_4A | |||||
| External Connections | Signal/Bus Name | ID TAG | Fault Modes | Diagnostics | Repeat | Claimed DC Coverage | |
| 1 | b2_b4_signaling | b1_b2_signal | Incorrect data | Data register corruption | Data parity | Y | |
| Incorrect clocking | Clock divider failure | External watchdog | |||||
| Internal Signal Block Connections | Signal/Bus Name | ID TAG | Fault Modes | Diagnostics | Repeat | EST DC Coverage | |
| 1 | b4A_b4B_signaling | b4A_b4B_signal | Incorrect data | Data register corruption | Data parity | 99.50% | |
| Incorrect clocking | Clock divider failure | External watchdog | 90.00% | ||||
| 2 | b4A_b4C_signaling | b4A_b4C_signal | Incorrect data | Data register corruption | Data parity | 99.50% | |
| Incorrect clocking | Clock divider failure | External watchdog | 90.00% | ||||
| 3 | b4A_b4E_signaling | b4A_b4E_signal | Incorrect data | Data register corruption | Data parity | 99.50% | |
| Incorrect clocking | Clock divider failure | External watchdog | 90.00% | ||||
| Block Function Description | ID TAG | Fault Modes | Diagnostics | Repeat | EST DC Coverage | ||
| Functional block stores the address and range information from the descriptor for the MM2S Channel. Controls stepping for the next descriptor. | Block_4A | Corrupted data storage | Single event upset | Parity | 99.50% | ||
| Decode wrong state | State machine corruption | Redundancy | 99.50% | ||||
| Sub Block | S2MM_Controller | Block_4F | |||||
| External Connections | Signal/Bus Name | ID TAG | Fault Modes | Diagnostics | Repeat | EST DC Coverage | |
| 1 | b4_b5_signaling | b4_b5_signal | Incorrect data | Data register corruption | Data parity | Y | |
| Incorrect clocking | Clock divider failure | External watchdog | |||||
| Internal Signal Block Connections | Signal/Bus Name | ID TAG | Fault Modes | Diagnostics | Repeat | EST DC Coverage | |
| 1 | b4B_b4F_signaling | b4B_b4F_signal | Incorrect data | Data register corruption | Data parity | 99.50% | |
| Incorrect clocking | Clock divider failure | External watchdog | 90.00% | ||||
| 2 | b4D_b4F_signaling | b4D_b4F_signal | Incorrect data | Data register corruption | Data parity | 99.50% | |
| Incorrect clocking | Clock divider failure | External watchdog | 90.00% | ||||
| 3 | b4E_b4F_signaling | b4E_b4F_signal | Incorrect data | Data register corruption | Data parity | 99.50% | |
| Incorrect clocking | Clock divider failure | External watchdog | 90.00% | ||||
| Block Function Description | ID TAG | Fault Modes | Diagnostics | Repeat | EST DC Coverage | ||
| Functional block stores the address and range information from the descriptor for the S2MM Channel. Controls stepping for the next descriptor | Block_4F | Corrupted data storage | Single event upset | Parity | 99.50% | ||
| Decode wrong state | State machine corruption | Redundancy | 99.50% | ||||
| Sub Block | Register_Interface | Block_4B | |||||
| External Connections | Signal/Bus Name | ID TAG | Fault Modes | Diagnostics | Repeat | EST DC Coverage | |
| 1 | b4_b5_signaling | b3_b4_signal | Incorrect data | Data parity | Y | ||
| Incorrect clocking | External watchdog | ||||||
| Internal Signal Block Connections | Signal/Bus Name | ID TAG | Fault Modes | Diagnostics | Repeat | EST DC Coverage | |
| 1 | b4A_b4B_signaling | b4A_b4B_signal | Incorrect data | Data register corruption | Data parity | 99.50% | |
| Incorrect clocking | Clock divider failure | External watchdog | 90.00% | ||||
| 2 | b4B_b4F_signaling | b4B_b4F_signal | Incorrect data | Data register corruption | Data parity | 99.50% | |
| Incorrect clocking | Clock divider failure | External watchdog | 90.00% | ||||
| Block Function Description | ID TAG | Fault modes | Diagnostics | Repeat | EST DC Coverage | ||
| Stores key register values for the command control of MM2S and S2MM controller blocks | Block_4B | Corrupted data storage | Single event upset | Parity | 99.50% | ||
| Sub Block | MM2S Descriptor Storage | Block_4C | |||||
| External connections | Signal/Bus Name | ID TAG | Fault modes | Diagnostics | Repeat | EST DC Coverage | |
| None | |||||||
| Internal Signal block Connections | Signal/Bus Name | ID TAG | Fault Modes | Diagnostics | Repeat | EST DC Coverage | |
| 1 | b4A_b4C_signaling | b4A_b4C_signal | Incorrect data | Data register corruption | Data parity | Y | |
| Incorrect clocking | Clock divider failure | External watchdog | |||||
| 2 | b4C_b4E_signaling | b4C_b4E_signal | Incorrect data | Data register corruption | Data parity | 99.50% | |
| Incorrect clocking | Clock divider failure | External watchdog | 90.00% | ||||
| Block Function Description | ID TAG | Fault Modes | Diagnostics | Repeat | EST DC Coverage | ||
| Stores descriptor for MM2S channel | Block_4C | Corrupted data storage | Single event upset | Parity | 99.50% | ||
| Sub Block | S2MM Descriptor Storage | Block_4D | |||||
| External Connections | Signal/Bus Name | ID TAG | Fault Modes | Diagnostics | Repeat | EST DC Coverage | |
| None | |||||||
| Internal Signal Block Connections | Signal/Bus Name | ID TAG | Fault Modes | Diagnostics | Repeat | EST DC Coverage | |
| 1 | b4D_b4E_signaling | b4D_b4E_signal | Incorrect data | Data register corruption | Data parity | 99.50% | |
| Incorrect clocking | Clock divider failure | External watchdog | 90.00% | ||||
| 2 | b4D_b4F_signaling | b4D_b4F_signal | Incorrect data | Data register corruption | Data parity | Y | |
| Incorrect clocking | Clock divider failure | External watchdog | |||||
| Block Function Description | ID TAG | Fault Modes | Diagnostics | Repeat | EST DC Coverage | ||
| Stores descriptor for S2MM channel | Block_4D | Corrupted data storage | Parity | 99.50% | |||
| Sub Block | AXI_Master | Block_4E | |||||
| External Connections | Signal/Bus Name | ID TAG | Fault Modes | Diagnostics | Repeat | EST DC Coverage | |
| 1 | m_axi_sg_ | TOP_axi_sg | Bus Write to incorrect address | Address Write register corruption | Parity | Y | |
| Control plane state machine corruption | Redundancy | ||||||
| Clocking corruption | |||||||
| Driver/receiver failure | |||||||
| Bus write with incorrect data | Write Data register corruption | Parity | |||||
| Control plane state machine corruption | Redundancy | ||||||
| Clocking corruption | |||||||
| Driver/receiver failure | Loopback | ||||||
| Bus Read from incorrect address | Read Address register corruption | Parity | |||||
| Control plane state machine corruption | Redundancy | ||||||
| Clocking corruption | |||||||
| Receiver failure | |||||||
| 1 (cont'd) | Bus read incorrect data | Read Data register corruption | Parity | Y | |||
| Control plane state machine corruption | Redundancy | ||||||
| Clocking corruption | |||||||
| Receiver failure | Parity | ||||||
| Bus hang | Control plane state machine corruption | Redundancy | |||||
| External watchdog | |||||||
| 2 | m_axi_sg_aclk | TOP_axi_sg_clk | No clock | None | Y | ||
| Incorrect clock frequency | None | ||||||
| Internal Signal block Connections | Signal/Bus Name | ID TAG | Fault Modes | Diagnostics | Repeat | EST DC Coverage | |
| 1 | b4A_b4E_signaling | b4A_b4E_signal | Incorrect data | Driver/receiver failure | Data parity | Y | |
| Incorrect clocking | Connection logic failure | External watchdog | |||||
| 2 | b4C_b4E_signaling | b4C_b4E_signal | Incorrect data | Driver/receiver failure | Data parity | Y | |
| Incorrect clocking | Connection logic failure | External watchdog | |||||
| 3 | b4D_b4E_signaling | b4D_b4E_signal | Incorrect data | Driver/receiver failure | Data parity | Y | |
| Incorrect clocking | Connection logic failure | External watchdog | |||||
| 4 | b4D_b4F_signaling | b4D_b4F_signal | Incorrect data | Driver/receiver failure | Data parity | Y | |
| Incorrect clocking | Connection logic failure | External watchdog | |||||
| Block Function Description | ID TAG | Fault Modes | Diagnostics | Repeat | EST DC Coverage | ||
| Drives AXI bus master protocol based on requests from MM2S controller block or S2MM controller block using round robin. Sends descriptor record to MM2S or S2MM storage. | Block_4E | Incorrect state | State machine corruption | Redundancy | 99.50% | ||