Two HW modules in xvdpu example, Multiscaler (VVAS) and xvdpu (DPUCVDX8G). Multiscaler reads video frames from memory, does resize and color space conversion, and writes the processed frames back into memory. The processed frames is the input of xvdpu, which does the AI processing.
The Multiscaler kernel is HLS code that can be built using Vitis HLS and the compiled kernel is provided as .xo file. xvdpu is RTL code and pre-built AIE’s libadf.a files, the RTL code can be packaged using Vitis tool as .xo file. The Vitis tool integrates the .xo files and libadf.a into the platform.
For detailed infomation about Multiscaler, please refer to https://xilinx.github.io/VVAS/docs/common/Acceleration-Hardware.html
For more information about xvdpu (DPUCVDX8G), please refer to the document PG389 ‘Xilinx Versal DPU (DPUCVDX8G) Product Guide’ https://www.xilinx.com/content/dam/xilinx/support/documentation/ip_documentation/dpucvdx8g/v1_0/pg389-dpucvdx8g.pdf. Default configuraion of xvdpu in this example is C32B1L2S2, its main frequency is 333 MHz.