Design Files - 2020.2 English - XD336

Versal Base TRD Documentation (XD336)

Document ID
XD336
Release Date
2025-12-01
Version
2020.2 English

The design source files are available at https://github.com/Xilinx/vck190-base-trd.git It has the following contents:

  • Petalinux Board Support Package (BSP)

  • Vivado hardware platform projects

  • Vitis accelerator overlay projects

  • HTML Documentation sources

  • README file

The design file hierarchy is shown below:

vck190-base-trd
├── docs
├── overlays
│   ├── filter2d
│      ├── apps
│         └── filter2d-notebooks
│      └── kernels
│          ├── filter2d_aie
│          ├── filter2d_combined
│          └── filter2d_pl
│   ├── Vitis_Libraries
│      └── vision
│   └── xvdpu
│       ├── apps
│          └── smart-mipi-app
│       └── kernels
│           ├── vitis_prj
│           └── xvdpu_ip
├── petalinux
│   └── xilinx-vck190-base-trd
├── platforms
│   ├── scripts
│   └── vivado
│       ├── ip
│       ├── vck190_hdmiRx_hdmiTx
│       ├── vck190_mipiRxQuad_hdmiTx
│       └── vck190_mipiRxSingle_hdmiTx
└── README.md

In the following tutorials, it is assumed that the design source files are cloned into a directory referred to as $working_dir, e.g.

export working_dir=/path/to/cloned/repo/vck190-base-trd