Step 1: Configuring and Running Timing Simulation in Questa Advanced Simulator - 2024.1 English

Vivado Design Suite Tutorial: Power Analysis and Optimization (UG997)

Document ID
UG997
Release Date
2024-05-30
Version
2024.1 English

You are now ready to set up and launch the Questa Advanced Simulator to run post-implementation timing simulation. Set the timing simulation properties in Vivado IDE, and run the timing simulation.

  1. In the Flow Navigator, right-click Simulation to select Simulation Settings. Set the timing simulation properties.
  2. In the Simulation Settings tab, set the Target simulator to Questa Advance Simulator.
  3. Click Yes to change your target simulator to Questa Advanced Simulator.

  4. Set questa.simulate.saif to power_tutorial_timing_questasim.saif.
  5. Set questa.simulate.saif_scope to testbench/dut_fpga.
  6. Make sure to check the questa.simulate.log_all_signals box.
  7. Note that the questa.simulate.runtime is 1000ns.

  8. Click OK. With the simulation settings properly configured, you can launch the Questa Advanced Simulator to perform a timing simulation of the design.
  9. In the Flow Navigator, click Run Simulation > Run Post-Implementation Timing Simulation.

    A separate Questa Advanced Simulator window opens and a design simulation starts.

  10. After the Questa Advanced Simulator has finished simulating the design, make sure that the requested SAIF file is generated. Check to see that the SAIF file requested in the simulation settings prior to running simulation appears in this directory:

    <project_directory>/power_tutorial1/power_tutorial1.sim/ sim_1/impl/timing/power_tutorial_timing_questasim.saif