Introduction - 2024.1 English

Vivado Design Suite Tutorial: Power Analysis and Optimization (UG997)

Document ID
UG997
Release Date
2024-05-30
Version
2024.1 English

In this lab, you will learn about using the Power Optimization features in AMD Vivado™ tools for AMD UltraScale+™ devices. The lab takes you through the steps for invoking Power Optimization after synthesizing the design. It also guides you on how to use the power optimization report, make decisions and selectively turn off power optimization on signals, blocks, and hierarchies.

Tip: When you run Implementation on your design, the Vivado tools can perform block RAM power optimizations by default during opt_design. These optimizations do not affect performance, and have little impact on area and compile time. In the previous Lab, the default block RAM power optimization was disabled (Step 9 of Lab 2) by setting a NoBramPowerOpt directive to opt_design.