Interfacing with AXI IP Outside of the Block Design - 2023.2 English

Vivado Design Suite User Guide: Designing IP Subsystems Using IP Integrator (UG994)

Document ID
UG994
Release Date
2023-10-18
Version
2023.2 English

There are situations when the AXI master is outside of the BD and connecting to AXI slaves inside the design. These external masters are typically connected to the BD using an AXI Interconnect. After the ports on the AXI interconnect are connected to an external port, by the Create Interface Port or Make External commands, the address editor is available in the IP integrator and memory mapping can be done as described in Addressing for Block Designs.

As an example, consider the BD shown in the following figure.

Figure 1. Example Design with External AXI Master Interfacing with Block Design

When the S00_AXI interface of the Interconnect is made external, the Address Editor window becomes available, and memory mapping all the slaves in the BD can be done in the normal manner.