Creating Vitis Platforms Using Vivado/IP Integrator - 2023.2 English

Vivado Design Suite User Guide: Designing IP Subsystems Using IP Integrator (UG994)

Document ID
UG994
Release Date
2023-10-18
Version
2023.2 English

The AMD Vitis™ unified software platform enables the development of embedded software and accelerated applications on heterogeneous AMD platforms including FPGAs, SoCs, and AMD Versal™ adaptive SoC. In the Vitis software platform, the environment for running the application is referred to as the target platform. The target platform is a combination of hardware components (XSA) and software components (including domain setup and, boot components like FSBL).

Hardware components of a platform are designed using the AMD Vivado™ Design Suite and IP Integrator. Software components of a platform are created using the Vitis or PetaLinux tool chain.

This chapter describes the flow to create and configure hardware components of a platform using the IP integrator. The design created using the IP integrator captures the logical and physical interfaces to the hardware functions coming from the Vitis environment. The processors, memory, and all external board interfaces are configured using a combination of AMD IP, custom IP, and RTL. This provides a logical wrapper for the hardware functions to be executed properly on the platform. Many configuration and customization options exist on the types of hardware functions being accelerated.

The embedded platform creation process is described in Creating Embedded Platforms in Vitis in the Vitis Unified Software Platform Documentation: Application Acceleration Development (UG1393). This chapter covers the functionality available in Vivado to complete the hardware portion of the platform.