Addressing Overview - 2024.1 English

Vivado Design Suite User Guide: Designing IP Subsystems Using IP Integrator (UG994)

Document ID
UG994
Release Date
2024-05-30
Version
2024.1 English

Masters such as a processor need to access slaves such as peripherals and memory. Masters access slaves by reading and writing to specific addresses over an interface such as AXI. IP integrator can create address assignments whereby slaves are visible to masters at specific address ranges. These address assignments are used to configure the masters and the interconnect IP such as the SmartConnect so they correctly route transactions based on the addresses.

Addressing can quickly become complex with nuanced rules, but the basics are straight forward.