xori - 2024.2 English

MicroBlaze Processor Reference Guide (UG984)
Document ID
UG984
Release Date
2024-11-27
Version
2024.2 English
Figure 1. xori xori Process.49 0 0 Process.44 0 0 Process.45 1 1 Process.46 0 0 Process.47 1 1 Process.48 1 1 Process.50 Process.9 rD, rA, IMM rD, rA, IMM Process.12 xori xori Process.13 rA rA Sheet.18 Logical Exclusive OR with Immediate Logical Exclusive OR with Immediate Sheet.20 0 0 Sheet.23 6 6 Sheet.24 11 11 Sheet.25 16 16 Sheet.27 31 31 Process.58 IMM IMM Process.80 rD rD

Description

The IMM field is extended to 32 bits by concatenating 16 0-bits on the left. The contents of register rA are XOR’ed with the extended IMM field; the result is placed into register rD.

Pseudocode

(rD) ← (rA) ⊕ sext(IMM)

Registers Altered

  • rD

Latency

  • 1 cycle

Notes

  • By default, Type B Instructions will take the 16-bit IMM field value and sign extend it to 32 bits to use as the immediate operand. This behavior can be overridden by preceding the Type B instruction with an imm instruction. See the instruction imm for details on using 32-bit immediate values.

  • When this instruction is used with rD set to r0, a program trace event is emitted with the 14 least significant bits of the result. Typically this is used to trace operating system events like context switches and system calls, but it can be used by any program to trace significant events. The functionality is enabled by setting C_DEBUG_ENABLED = 2 (Extended) and C_DEBUG_TRACE_SIZE > 0. See Program and Event Trace for further details.